Scalable FFT Architecture vs. Multiple Pipeline FFT Architectures Hardware Implementation and Cost
نویسندگان
چکیده
— This paper presents a family of architectures for FFT implementation based on the decomposition of the perfect shuffle permutation, which can be designed with variable number of processing elements. This provides designers with a trade-off choice of speed vs. complexity (cost and area.). Hardware comparison to other existing pipeline architecture presented based on implementation of 1024-point FFT with 4 processing elements using 45nm process technology. The proposed architecture is most suitable for handheld and portable multimedia applications Keywords—Scalable, Architecture, FFT, 45nm technology, FIFO (key words)
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